Built from First Principles.

Engineered from scratch for multi-threaded in-memory data processing. No inherited technical debt, no runtime overhead, no compromises.

Designed for Predictable Performance

FlashKey's architecture eliminates the bottlenecks that limit traditional in-memory stores.

Multi-Threaded Event Loop

Each worker thread runs its own epoll/kqueue event loop, processing commands in parallel without contention.

Per-Thread Memory Arenas

Thread-local memory allocation eliminates lock contention and provides predictable allocation performance.

Lock-Free Data Structures

Concurrent hash tables and skip lists enable parallel reads and writes without mutex overhead.

Integrated Storage Engine

MVCC snapshots and AOF persistence built directly into the core — no external process coordination.

From Request to Response

Every operation follows a deterministic path optimized for minimal latency.

1

Connection Accept

Incoming connections distributed across worker threads via SO_REUSEPORT.

2

Command Parsing

RESP2/RESP3 protocol parsing with zero-copy buffer management.

3

Execution

Command executed on thread-local data structures with MVCC isolation.

4

Response

Result serialized and sent back via the same worker thread's event loop.

Scale Horizontally, Transparently

FlashKey cluster distributes data across nodes using Redis-compatible hash slot allocation.

Master Nodes

Primary data holders with automatic hash slot assignment. Each master handles a subset of the 16,384 hash slots.

Replica Nodes

Real-time synchronized copies for read scaling and automatic failover. Each master can have multiple replicas.

Sentinel

Integrated monitoring and automatic failover coordination. Detects master failures and promotes replicas without manual intervention.

Purpose-Built Technology Choices

Every component chosen for performance and reliability.

C11
Manual memory management, zero runtime overhead, direct hardware access
epoll / kqueue
Platform-native event-driven I/O for maximum connection throughput
AES-256-CTR
Hardware-accelerated encryption with AES-NI instruction set support
Lua 5.1
Embedded scripting engine for server-side command composition

Ready to See the Architecture in Action?

Our engineering team will walk you through the design decisions.